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2 changed files with 6 additions and 12 deletions

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@ -1,3 +1,4 @@
#![allow(internal_features)]
#![feature(const_eval_select)]
#![feature(const_likely)]
#![feature(const_maybe_uninit_array_assume_init)]

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@ -5,8 +5,12 @@ use crate::util;
use util::cast;
// these may be unused depending on target features.
#[allow(unused)]
const W_128: usize = 128 / 8;
#[allow(unused)]
const W_256: usize = 256 / 8;
#[allow(unused)]
const W_512: usize = 512 / 8;
/// The value which cause `vpshufb` to write 0 instead of indexing.
@ -258,6 +262,7 @@ macro_rules! impl_load {
}}
}
#[allow(unused_macros)]
macro_rules! simd_load_fallback {
($ty:ty, $vec_ty:ty, $self:ident) => {{
let mut a = core::mem::MaybeUninit::uninit_array();
@ -599,13 +604,6 @@ pub fn interleave_m64(a: __m128i, b: __m128i) -> __m128i {
#[inline(always)]
pub fn interleave_m128(a: __m128i, b: __m128i) -> __m256i {
const INTERLEAVE_A: Simd<u8, 32> = Simd::from_array(util::array_op!(gen[32] |i| {
if i & 1 == 0 {
(i as u8) >> 1
} else {
0xff
}
}));
const INTERLEAVE_B: Simd<u8, 32> = Simd::from_array(util::array_op!(gen[32] |i| {
if i & 1 == 0 {
0xff
@ -938,15 +936,10 @@ mod test {
const EXPECTED: [u8; 32] = array_op!(gen[32] |i| i as u8);
const A: [u8; 16] = array_op!(gen[16] |i| (i as u8) << 1);
const B: [u8; 16] = array_op!(gen[16] |i| ((i as u8) << 1) + 1);
const A1: [u8; 32] = array_op!(gen[32] |i| (i as u8) << 1);
const B1: [u8; 32] = array_op!(gen[32] |i| ((i as u8) << 1) + 1);
let a = Simd::from_array(A).into();
let b = Simd::from_array(B).into();
//let a = merge_m128_m256(a, a);
//let b = merge_m128_m256(b, b);
let actual = interleave_m128(a, b);
assert_eq!(Simd::from(actual), Simd::from_array(EXPECTED));
}