146 lines
3.6 KiB
C++
146 lines
3.6 KiB
C++
// This file is part of the Luau programming language and is licensed under MIT License; see LICENSE.txt for details
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#pragma once
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#include "Luau/Common.h"
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#include "Luau/RegisterX64.h"
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#include <stdint.h>
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namespace Luau
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{
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namespace CodeGen
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{
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namespace X64
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{
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enum class CategoryX64 : uint8_t
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{
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reg,
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mem,
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imm,
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};
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struct OperandX64
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{
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constexpr OperandX64(RegisterX64 reg)
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: cat(CategoryX64::reg)
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, index(noreg)
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, base(reg)
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, memSize(SizeX64::none)
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, scale(1)
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, imm(0)
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{
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}
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constexpr OperandX64(int32_t imm)
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: cat(CategoryX64::imm)
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, index(noreg)
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, base(noreg)
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, memSize(SizeX64::none)
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, scale(1)
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, imm(imm)
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{
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}
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constexpr explicit OperandX64(SizeX64 size, RegisterX64 index, uint8_t scale, RegisterX64 base, int32_t disp)
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: cat(CategoryX64::mem)
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, index(index)
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, base(base)
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, memSize(size)
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, scale(scale)
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, imm(disp)
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{
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}
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// Fields are carefully placed to make this struct fit into an 8 byte register
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CategoryX64 cat;
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RegisterX64 index;
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RegisterX64 base;
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SizeX64 memSize : 4;
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uint8_t scale : 4;
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int32_t imm;
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constexpr OperandX64 operator[](OperandX64&& addr) const
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{
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LUAU_ASSERT(cat == CategoryX64::mem);
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LUAU_ASSERT(index == noreg && scale == 1 && base == noreg && imm == 0);
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LUAU_ASSERT(addr.memSize == SizeX64::none);
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addr.cat = CategoryX64::mem;
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addr.memSize = memSize;
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return addr;
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}
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};
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constexpr OperandX64 addr{SizeX64::none, noreg, 1, noreg, 0};
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constexpr OperandX64 byte{SizeX64::byte, noreg, 1, noreg, 0};
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constexpr OperandX64 word{SizeX64::word, noreg, 1, noreg, 0};
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constexpr OperandX64 dword{SizeX64::dword, noreg, 1, noreg, 0};
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constexpr OperandX64 qword{SizeX64::qword, noreg, 1, noreg, 0};
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constexpr OperandX64 xmmword{SizeX64::xmmword, noreg, 1, noreg, 0};
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constexpr OperandX64 ymmword{SizeX64::ymmword, noreg, 1, noreg, 0};
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constexpr OperandX64 operator*(RegisterX64 reg, uint8_t scale)
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{
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if (scale == 1)
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return OperandX64(reg);
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LUAU_ASSERT(scale == 1 || scale == 2 || scale == 4 || scale == 8);
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LUAU_ASSERT(reg.index != 0b100 && "can't scale SP");
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return OperandX64(SizeX64::none, reg, scale, noreg, 0);
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}
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constexpr OperandX64 operator+(RegisterX64 reg, int32_t disp)
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{
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return OperandX64(SizeX64::none, noreg, 1, reg, disp);
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}
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constexpr OperandX64 operator-(RegisterX64 reg, int32_t disp)
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{
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return OperandX64(SizeX64::none, noreg, 1, reg, -disp);
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}
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constexpr OperandX64 operator+(RegisterX64 base, RegisterX64 index)
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{
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LUAU_ASSERT(index.index != 4 && "sp cannot be used as index");
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LUAU_ASSERT(base.size == index.size);
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return OperandX64(SizeX64::none, index, 1, base, 0);
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}
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constexpr OperandX64 operator+(OperandX64 op, int32_t disp)
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{
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LUAU_ASSERT(op.cat == CategoryX64::mem);
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LUAU_ASSERT(op.memSize == SizeX64::none);
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op.imm += disp;
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return op;
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}
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constexpr OperandX64 operator+(OperandX64 op, RegisterX64 base)
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{
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LUAU_ASSERT(op.cat == CategoryX64::mem);
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LUAU_ASSERT(op.memSize == SizeX64::none);
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LUAU_ASSERT(op.base == noreg);
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LUAU_ASSERT(op.index == noreg || op.index.size == base.size);
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op.base = base;
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return op;
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}
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constexpr OperandX64 operator+(RegisterX64 base, OperandX64 op)
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{
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LUAU_ASSERT(op.cat == CategoryX64::mem);
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LUAU_ASSERT(op.memSize == SizeX64::none);
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LUAU_ASSERT(op.base == noreg);
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LUAU_ASSERT(op.index == noreg || op.index.size == base.size);
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op.base = base;
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return op;
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}
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} // namespace X64
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} // namespace CodeGen
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} // namespace Luau
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