Merge v0.7.0 into master #6
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@ -1,6 +1,6 @@
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[package]
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name = "tide_tracing"
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version = "0.6.3"
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version = "0.7.0"
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authors = ["Michael Pfaff <michael@pfaff.dev>"]
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edition = "2021"
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license = "MIT OR Apache-2.0"
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@ -10,4 +10,4 @@ nrid = { git = "https://git.pfaff.dev/michael/nrid.rs.git", tag = "v0.2.0", defa
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tide = { version = "0.16", default-features = false }
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tracing = "0.1"
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async-trait = "0.1"
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num_enum = "0.5"
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num_enum = "0.7"
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47
src/lib.rs
47
src/lib.rs
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@ -1,5 +1,3 @@
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#![feature(const_trait_impl)]
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#[macro_use]
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extern crate tracing;
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@ -29,38 +27,47 @@ pub struct ReqComps(u8);
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impl ReqComps {
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#[inline]
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pub const fn contains(self, mask: ReqComp) -> bool {
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(self & mask).0 == mask as u8
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self.bitand_one(mask).0 == mask as u8
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}
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#[inline]
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pub const fn contains_all(self, mask: ReqComps) -> bool {
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self & mask == mask
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pub const fn contains_all(self, mask: Self) -> bool {
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self.bitand_self(mask).0 == mask.0
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}
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#[inline]
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const fn bitand_self(self, rhs: Self) -> Self {
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Self((self.0 as u8) & (rhs.0 as u8))
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}
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#[inline]
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const fn bitand_one(self, rhs: ReqComp) -> Self {
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Self((self.0 as u8) & (rhs as u8))
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}
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}
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impl const Default for ReqComps {
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impl Default for ReqComps {
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#[inline]
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fn default() -> Self {
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Self(0)
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}
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}
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// unfortunately, the automatic Into impl will not be const.
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impl const From<ReqComp> for ReqComps {
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impl From<ReqComp> for ReqComps {
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#[inline]
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fn from(comp: ReqComp) -> Self {
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Self(comp as u8)
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}
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}
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impl const core::cmp::PartialEq for ReqComps {
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impl core::cmp::PartialEq for ReqComps {
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#[inline]
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fn eq(&self, comp: &Self) -> bool {
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self.0 == comp.0
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}
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}
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impl const core::ops::BitOr for ReqComp {
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impl core::ops::BitOr for ReqComp {
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type Output = ReqComps;
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#[inline]
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|
@ -69,16 +76,16 @@ impl const core::ops::BitOr for ReqComp {
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}
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}
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impl const core::ops::BitOr for ReqComps {
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impl core::ops::BitOr for ReqComps {
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type Output = ReqComps;
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#[inline]
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fn bitor(self, rhs: Self) -> Self::Output {
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ReqComps((self.0 as u8) | (rhs.0 as u8))
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ReqComps(self.0 | rhs.0)
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}
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}
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impl const core::ops::BitOr<ReqComp> for ReqComps {
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impl core::ops::BitOr<ReqComp> for ReqComps {
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type Output = ReqComps;
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#[inline]
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|
@ -87,7 +94,6 @@ impl const core::ops::BitOr<ReqComp> for ReqComps {
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}
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}
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// TODO make `const` when is "stable" #57349 <https://github.com/rust-lang/rust/issues/57349>
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impl core::ops::BitOrAssign for ReqComps {
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#[inline]
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fn bitor_assign(&mut self, rhs: ReqComps) {
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|
@ -95,7 +101,6 @@ impl core::ops::BitOrAssign for ReqComps {
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}
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}
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// TODO make `const` when is "stable" #57349 <https://github.com/rust-lang/rust/issues/57349>
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impl core::ops::BitOrAssign<ReqComp> for ReqComps {
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#[inline]
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fn bitor_assign(&mut self, rhs: ReqComp) {
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|
@ -103,7 +108,7 @@ impl core::ops::BitOrAssign<ReqComp> for ReqComps {
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}
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}
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impl const core::ops::BitAnd for ReqComp {
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impl core::ops::BitAnd for ReqComp {
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type Output = ReqComps;
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#[inline]
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|
@ -112,21 +117,21 @@ impl const core::ops::BitAnd for ReqComp {
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}
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}
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impl const core::ops::BitAnd for ReqComps {
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impl core::ops::BitAnd for ReqComps {
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type Output = ReqComps;
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|
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#[inline]
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fn bitand(self, rhs: Self) -> Self::Output {
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ReqComps((self.0 as u8) & (rhs.0 as u8))
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self.bitand_self(rhs)
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}
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}
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|
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impl const core::ops::BitAnd<ReqComp> for ReqComps {
|
||||
impl core::ops::BitAnd<ReqComp> for ReqComps {
|
||||
type Output = ReqComps;
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||||
|
||||
#[inline]
|
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fn bitand(self, rhs: ReqComp) -> Self::Output {
|
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ReqComps((self.0 as u8) & (rhs as u8))
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self.bitand_one(rhs)
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}
|
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}
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||||
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|
@ -151,7 +156,7 @@ pub struct LogMiddleware {
|
|||
pub components: ReqComps,
|
||||
}
|
||||
|
||||
impl const Default for LogMiddleware {
|
||||
impl Default for LogMiddleware {
|
||||
#[inline]
|
||||
fn default() -> Self {
|
||||
Self {
|
||||
|
|
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